The present invention relates to probe measurement systems for testing integrated circuits and other microelectronic devices and, more particularly, probe measurement systems utilizing differential signals to test circuits and devices.
Integrated circuits (ICs) and other microelectronic devices are fabricated on the surface of a wafer or substrate and commonly utilize single ended or ground referenced signals that are referenced to a ground plane at the lower surface of the substrate on which the active and passive devices of the circuit are fabricated. As a result of the physical make up of the devices of an integrated circuit, parasitic interconnections exist between many of the parts of the individual devices and between parts of the devices and the wafer on which the devices are fabricated. These interconnections are commonly capacitive and/or inductive in nature and exhibit frequency dependent impedances. For example, the terminals of transistors fabricated on semi-conductive substrates or wafers are typically capacitively interconnected, through the substrate, to the ground plane and, at higher frequencies, the ground potential and the true nature of ground referenced signals becomes uncertain. Balanced devices utilizing differential signals are more tolerant to poor radio frequency (RF) grounding than single ended devices making them increasingly attractive as ICs are operated at higher and higher frequencies.
Referring to FIG. 1, a differential gain cell 20 is a balanced device comprising two nominally identical circuit halves 20A, 20B. When biased with direct current, for example, a current sourced from a DC current source 22, and stimulated with a differential mode signal, comprising even and odd mode components of equal amplitude and opposite phase (Si+1 and Si−1), a virtual ground is established at the symmetrical axis 26 of the two circuit halves. At the virtual ground, the potential at the operating frequency does not change with time regardless of the amplitude of the stimulating signal. The quality of the virtual ground of a balanced device is independent of the physical ground path enabling balanced or differential circuits to tolerate poor RF grounding better than circuits operated with single ended signals. In addition, the two component waveforms of the differential output signal (So+1 and So−1) are mutual references enabling digital devices to operate faster, with greater certainty in transitioning from one binary value to the other and with a reduced voltage swing for the signal. Moreover, balanced or differential circuits have good immunity to noise from external sources, such as adjacent conductors, because noise tends to couple, electrically and electromagnetically, in the common mode and cancel in the differential mode. The improved immunity to noise extends to even-harmonic frequencies since signals that are of opposite phase at the fundamental frequency are in phase at the even harmonics.
Following fabrication of the ICs, the individual dies on which the ICs are fabricated are separated or singulated and encased in a package that provides for electrical connections between the exterior of the package and the circuit on the enclosed die. The separation and packaging of a die comprises a significant portion of the cost of manufacturing a device that includes an IC and to monitor and control the IC fabrication process and avoid the cost of packaging defective dies, manufacturers commonly add electrical circuits or test structures to the wafer to enable on-wafer testing or “probing” to verify characteristics of elements of the integrated circuits before the dies are singulated. A test structure typically includes a device-under-test (DUT) 30, a plurality of metallic probe or bond pads 32 that are deposited at the wafer's surface and a plurality of conductive vias 34 that connect the bond pads to the DUT which is typically fabricated beneath the surface of the wafer with the same process that is used to fabricate the corresponding components of the marketable IC. The DUT typically comprises a simple circuit that includes a copy of one or more of the basic elements of the marketable integrated circuit, such as a single line of conducting material, a chain of vias or a single transistor. Since the circuit elements of the DUT are fabricated with the same process as the corresponding elements of the marketable integrated circuits, the electrical properties of the DUT are expected to be representative of the electrical properties of the corresponding components of the marketable integrated circuit.
The DUT of the test structure 40 comprises the differential gain cell 20, a common elemental device of balanced or differential circuitry. A differential gain cell has five terminals; four signal terminals and a bias terminal through which the transistors of the differential cell are biased. The four signal terminals comprise two input terminals to receive the even and odd mode components of the differential input signal from a signal source and two output terminals to transmit the even and odd mode components of the differential output signal for the differential gain cell to a signal sink. Two probes 42, 44 are commonly utilized when probing a test structure comprising a differential or balanced device. One probe typically conducts the signals from the signal source to the probe pads of the test structure and the second probe conducts the signals from the test structure to the signal sink. Typically, one of the two probes has at least three probe tips, in a signal-ground-signal arrangement, to conduct two of the differential signal components and to bias the transistors of the differential cell.
ICs are typically characterized “on-wafer” by applying a test instrument generated signal to the test structure and measuring the response of the test structure to the signal. Referring to FIG. 2, at higher frequencies, on-wafer characterization is commonly performed with a network analyzer 100. A network analyzer comprises a source 102 of an AC signal, often a radio frequency (RF) signal, that is used to stimulate the DUT 30 of a test structure. Directional couplers or bridges pick off the forward or reverse waves traveling to or from the test structure and direct them to a signal sink 104 where they are down-converted in intermediate frequency (IF) sections, filtered, amplified and digitized. The result of the signal processing in the network analyzer is a plurality of s-parameters (scattering parameters), the ratio of a normalized power wave comprising the response of the DUT to the normalized power wave comprising the stimulus supplied by the signal source, that register the response of the DUT to the stimulating signal. A forward-reverse switch 106 enables reversing the connections between the probe(s) and the network analyzer so that the respective pairs of probe pads receiving the input signal and transmitting the output signal can be reversed.
A four-port network analyzer is desirable when testing differential devices because it can output and receive differential signals enabling mixed mode analysis of the devices. However, four-port network analyzers are relatively uncommon and expensive. Two-port network analyzers are more common and often used when testing differential devices. However, two-port network analyzers output and receive single ended signals which must be converted to or from differential signals for stimulating the balanced device and analyzing its output.
The single ended signal output by the network analyzer may include a DC offset. If so, the output signal is commonly conducted to a bias tee 108 which comprises a capacitor 110 in series with the bias tee's radio frequency (RF) port 112 and an inductor 114, in series with a direct current (DC) port 116. The capacitor blocks transmission of the DC component of the signal from the RF port and the inductor blocks transmission of the modulated signal from the DC port but permits transmission of the DC portion of the signal. The DC port of the bias tee 108 is interconnected through the bias probe tip 140 to the bias probe pad 150 of the test structure enabling biasing of the transistors of the differential cell with the DC component of the output signal of the network analyzer.
The modulated signal from the RF port of the bias tee 108 is conducted to a balun 120 which converts the single ended signal to a balanced or differential signal comprising two differential signal components (Si+1 and Si−1) having substantially the same amplitude but opposite phase. Typically, the two components of the differential signal are transmitted over a coaxial cable from the balun to respective signal probe tips 146, 148 of a probe 42 which provides a transition from the signal path the coaxial cable to the signal path of the test structure's probe pads. The probe is movable relative to the test structure so that the each of the probe tips may be co-located with respective probe pads which are connected to the DUT.
The DUT sinks the differential input signals and outputs the differential output signal components (So+1 and So−1) which are conducted to respective probe pads 152, 154 of the differential gain cell. The components of the differential output signals are transmitted to a balun 122 which converts the differential signal components to a single ended signal which is transmitted to the signal sink 104 of the network analyzer for processing, analysis and display.
A balun used to convert single ended signals to differential signals and vice versa is commonly a transformer with an unbalanced connection made to one of the windings and a balanced connection made to the other winding and, typically, an expensive device. Further, baluns are typically large relative to the probe and are commonly remotely located and connected to the probe with coaxial cable which complicates the set up of the test instrumentation. What is desired, therefore, is a probe that incorporates a balun enabling use of a two-port network analyzer when probing differential circuits to reduce the cost and simplify the set up of the probing instrumentation.